Design of algorithms for Bayesian networks structure learning in large data volumes. Application to process control in the semiconductor industry, with a view towards in-line equpments drift detection, which may have an impact on cycle duration, performance and manufacturing costs. This work is part of the Integrated Solutions for Agile Manufacturing in High-mix Semiconductor Fabs european project (INTEGRATE), which was initiated by the European Nanoelectronics Initiative Advisory Council (ENIAC) and is funded by the EU’s Seventh Framework Programme for Research (FP7).